DocumentCode
2334229
Title
Approaches to statistical circuit analysis for deep sub-micron technologies
Author
Orshansky, Michael ; Chen, James C. ; Hu, Chenming ; Wan, Daniel ; Bendix, Peter
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., California Univ., Berkeley, CA, USA
fYear
1998
fDate
35953
Firstpage
6
Lastpage
9
Abstract
Difficulties of statistical circuit analysis for deep submicron CMOS technologies are discussed. The complex patterns of variation in device parameters observed make previously used methods invalid. An approach that couples the extracted SPICE parameter sets with their physical locations is advocated as an alternative
Keywords
CMOS integrated circuits; SPICE; circuit analysis computing; circuit complexity; statistical analysis; CMOS technology; SPICE parameter sets; device parameter variation patterns; parameter physical locations; statistical circuit analysis; CMOS logic circuits; CMOS technology; Circuit analysis; Circuit optimization; Independent component analysis; Measurement standards; Principal component analysis; SPICE; Sampling methods; Stochastic processes;
fLanguage
English
Publisher
ieee
Conference_Titel
Statistical Metrology, 1998. 3rd International Workshop on
Conference_Location
Honolulu, HI
Print_ISBN
0-7803-4338-7
Type
conf
DOI
10.1109/IWSTM.1998.729753
Filename
729753
Link To Document