• DocumentCode
    2334231
  • Title

    Study on SiGe nanowire shape engineering and Ge condensation

  • Author

    Ma, Fa-Jun ; Chia, Boon Seng ; Rustagi, Subhash C. ; Samudra, Ganesh C.

  • Author_Institution
    Dept. of Electr. & Comput. Eng., Nat. Univ. of Singapore, Singapore, Singapore
  • fYear
    2010
  • fDate
    1-3 Dec. 2010
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In recent years, Si and Si1-xGex nanowires have received tremendous attention especially for their potential in optical and electronics devices. With the thermal oxidation technique, they are well compatible with current CMOS-based electronic devices and thus can be building blocks for nanoscale device applications ranging from biological sensors to nanoelectronics to catalyst-assisted growing techniques. However, the dry oxidation of Si1-xGex nanowires has not attracted much attention. The models in the simulators also generally fail in predicting the evolution and the final shape of the nanostructures. In this study, we deduced a universal parameter set from silicon fin oxidation experiment and used it to study shape engineering and Ge condensation in SiGe nanowire formation with TSUMPREM-IV simulator.
  • Keywords
    CMOS integrated circuits; Ge-Si alloys; condensation; nanowires; oxidation; semiconductor process modelling; semiconductor quantum wires; transmission electron microscopy; CMOS-based electronic devices; Ge condensation; SiGe; SiGe nanowire shape engineering; TEM; TSUMPREM-IV simulator; dry oxidation; oxide thickness; silicon FIN nanostructures; silicon fin oxidation; stress-retarded orientation-dependent 2D oxidation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Enabling Science and Nanotechnology (ESciNano), 2010 International Conference on
  • Conference_Location
    Kuala Lumpur
  • Print_ISBN
    978-1-4244-8853-7
  • Type

    conf

  • DOI
    10.1109/ESCINANO.2010.5701078
  • Filename
    5701078