Title :
Application of IDDT test towards increasing SRAM reliability in nanometer technologies
Author :
Gyepes, Gábor ; Arbet, Daniel ; Brenkus, Juraj ; Stopjaková, Viera
Author_Institution :
Inst. of Electron. & Photonics, Slovak Univ. of Technol., Bratislava, Slovakia
Abstract :
Dynamic supply current test method (IDDT test) in static random access memory (SRAM) cell arrays is addressed in order to unveil weak open defects. Simulations were carried out on a 64-bit SRAM circuit, where several parameters of the IDDT waveform were monitored. The SRAM circuit was designed in a 90 nm CMOS technology. Efficiency of IDDT test in unveiling open defects was evaluated and the achieved results were compared for four SRAM arrays with cells of different cell ratio (CR). Moreover, a solution for transformation of the dynamic current to voltage is presented. After the transformation of the current waveform to a voltage waveform, the parameters of the voltage waveform similar to those of the current waveform are easily monitored and evaluated.
Keywords :
CMOS digital integrated circuits; SRAM chips; integrated circuit design; integrated circuit reliability; integrated circuit testing; CMOS technology; CR; IDDT test; SRAM circuit; SRAM reliability; cell ratio; current waveform; dynamic current; dynamic supply current test method; dynamic voltage; nanometer technologies; size 90 nm; static random access memory cell arrays; unveiling open defects; voltage waveform; word length 64 bit; CMOS integrated circuits; Circuit faults; Integrated circuit modeling; Monitoring; Random access memory; Testing; Transistors; 6-transistor cell; IDDT; SRAM; current test; dynamic supply current; memory test; open defects; parametric test;
Conference_Titel :
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2012 IEEE 15th International Symposium on
Conference_Location :
Tallinn
Print_ISBN :
978-1-4673-1187-8
Electronic_ISBN :
978-1-4673-1186-1
DOI :
10.1109/DDECS.2012.6219046
