• DocumentCode
    2334616
  • Title

    On the reconfigurable operation of arrays with defects for image processing

  • Author

    Salinas, Jose ; Lombardi, Fabrizio

  • Author_Institution
    Dept. of Comput. Sci., Texas A&M Univ., College Station, TX, USA
  • fYear
    1993
  • fDate
    27-29 Oct 1993
  • Firstpage
    88
  • Lastpage
    95
  • Abstract
    The authors examine the operation and a reconfiguration strategy for two-dimensional SIMD parallel architectures in the presence of manufacturing cluster defects and/or link defects when used for image processing. The proposed technique is based on a conceptual reconfiguration of processing elements by covering each large defect area with a set of fault-free elements, thus creating a loss of image resolution instead of a loss of image data. The proposed technique has been emulated on a 2048 PE MasPar architecture assuming both mesh connected elements (four-way connection) and eight-way connections
  • Keywords
    reconfigurable architectures; 2048 PE MasPar architecture; data mapping; defects; eight-way connections; four-way connection; image processing; link defects; loss of image resolution; manufacturing cluster defects; mesh connected elements; reconfigurable operation of arrays; two-dimensional SIMD parallel architectures; Circuit faults; Computational modeling; Computer architecture; Emulation; Hardware; Image processing; Image resolution; Integrated circuit interconnections; Parallel architectures; Pixel;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Defect and Fault Tolerance in VLSI Systems, 1993., The IEEE International Workshop on
  • Conference_Location
    Venice
  • ISSN
    1550-5774
  • Print_ISBN
    0-8186-3502-9
  • Type

    conf

  • DOI
    10.1109/DFTVS.1993.595657
  • Filename
    595657