DocumentCode
2334643
Title
Multiple stuck-at-fault detection theorem
Author
Ubar, Raimund ; Kostin, Sergei ; Raik, Jaan
Author_Institution
Dept. of Comput. Eng., Tallinn Univ. of Technol., Tallinn, Estonia
fYear
2012
fDate
18-20 April 2012
Firstpage
236
Lastpage
241
Abstract
The paper discusses the problem of testing multiple faults in combinational circuits. A definition of a test group is introduced for easier handling of fault masking. Test pair, as a known concept for proving correctness of a line in the circuit is regarded as a special case of the test group. A theorem is proved that if the test group will pass then a particular sub-circuit can be regarded as fault free at any possible combination of stuck-at-faults (SAF) in the circuit. Unlike the traditional approaches, we do not target the faults as test objectives. The goal is to verify the correctness of a part of the circuit. The whole test sequence is presented as a set of test groups where each group has the goal to identify the correctness of a selected part of a circuit.
Keywords
combinational circuits; fault diagnosis; fault trees; logic testing; SAF; combinational circuit; fault free; fault masking; multiple stuck-at-fault detection theorem; test pair; Circuit faults; Combinational circuits; Fault diagnosis; Integrated circuit modeling; Logic gates; Skeleton; Testing; combinational circuits; fault masking; multiple faults;
fLanguage
English
Publisher
ieee
Conference_Titel
Design and Diagnostics of Electronic Circuits & Systems (DDECS), 2012 IEEE 15th International Symposium on
Conference_Location
Tallinn
Print_ISBN
978-1-4673-1187-8
Electronic_ISBN
978-1-4673-1186-1
Type
conf
DOI
10.1109/DDECS.2012.6219064
Filename
6219064
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