Title :
VLSI process optimization using Taguchi method with multiple-criteria approach
Author_Institution :
United Microelectron. Corp., Hsinchu, Taiwan
Abstract :
A novel optimization technique is presented to solve the multiple-criteria problems of VLSI manufacturing processes. The method is based on the technique for order preference by similarity to ideal solution (TOPSIS), with the weight of each criterion being optimized with respect to experimental conditions using the Taguchi method. This method leads to a unique solution and thus no engineering judgement uncertainty is involved. A polysilicon deposition process is used to illustrate the implementation of this method and the results are compared with previous studies
Keywords :
Taguchi methods; VLSI; chemical vapour deposition; design of experiments; integrated circuit design; integrated circuit testing; integrated circuit yield; optimisation; Si; TOPSIS method; Taguchi method; VLSI manufacturing processes; VLSI process optimization; criterion weight optimization; engineering judgement uncertainty; multiple-criteria approach; multiple-criteria problems; optimization technique; polysilicon LPCVD; polysilicon deposition process; technique for order preference by similarity to ideal solution method; Decision making; Design for experiments; Manufacturing processes; Microelectronics; Optimization methods; Pressure control; Technological innovation; Temperature control; Uncertainty; Very large scale integration;
Conference_Titel :
Statistical Metrology, 1998. 3rd International Workshop on
Conference_Location :
Honolulu, HI
Print_ISBN :
0-7803-4338-7
DOI :
10.1109/IWSTM.1998.729780
