New Automatic Agent-Based Solutions for Feasible Reconfigurable MP-SoC Architectures

This paper deals with automatic low-power and low-memory reconfigurations of flexible MP-SoC embedded architectures. The goal is to allow run-time software/hardware reconfigurations of the system that should be adapted to its changeable environment. Software reconfigurations mean the addition/removal/update of OS tasks and hardware adaptations mean the activation/deactivation of a processor. The OS tasks are considered to be under precedent constraints and shared resources. When such scenario is applied, the power consumption may increase and some real-time constraints may be violated. Moreover, the system´s memory may not be able to support the added tasks after reconfiguration. For that, a master-slave oriented multi-agent architecture is proposed such that a master agent is defined for the whole control of this distributed multi-processors architecture, and a slave agent is affected to each processor for the local control of energy and memory. A communication protocol between the different proposed agents is defined for the minimization of the energy consumption and also the memory occupation related to each processor. We propose several technical solutions as the parameter modification of periodic and aperiodic tasks, hardware migration, bin-packing based re-location of tasks to satisfy real-time and energy constraints after any reconfiguration. A simulator of a FPGA Stratix III is developed for the evaluation of the whole paper´s contribution in order to show the efficiency of the proposed solutions.