Title :
Evaluating Performance and Power Efficiency of Scientific Applications on Multi-threaded Systems
Author :
Gioiosa, Roberto ; Kerbyson, Darren J. ; Hoisie, Adolfy
Author_Institution :
High Performance Comput. Group, Pacific Northwest Nat. Lab., Richland, WA, USA
Abstract :
The power and energy walls are changing the way users utilize supercomputers: Time-to-completion is not the only important goal but other metrics, such as the energy required to solve a problem or the power efficiency, are becoming as important as performance. This shift towards power- and energy-aware computing is expected to continue in the exascale era, thus, understanding the performance, power and energy implications of different hardware configurations is of paramount importance. In this paper we analyze the performance, power efficiency and energy consumption of scientific applications programmed in MPI, OpenMP and MPI+OpenMP on two different architectures that have take different approaches to limit power consumption, IBM POWER7+ and AMD Interlagos. We compare the scalability, power efficiency and energy consumption of distributed and shared memory versions of each applications and analyze performance and bottlenecks of different combinations of MPI tasks/OpenMP threads. Our results show that, although shared memory programming models usually provide lower synchronization cost, achieving the highest performance/efficiency requires a combination for MPI tasks/OpenMP threads that is dependent on the underlying architecture and takes into consideration how hardware resources are distributed among the computing elements. More importantly, our results show that the "best configuration" strongly depends on the particular target metric.
Keywords :
application program interfaces; mainframes; message passing; multi-threading; natural sciences computing; performance evaluation; power aware computing; shared memory systems; AMD Interlagos; IBM POWER7+; MPI; OpenMP; distributed memory versions; energy consumption; energy walls; energy-aware computing; exascale era; hardware configurations; hardware resources; multithreaded systems; performance evaluation; power efficiency; power walls; power-aware computing; scientific applications; shared memory programming models; shared memory versions; supercomputer; time-to-completion; Benchmark testing; Computer architecture; Hardware; Instruction sets; Measurement; Power demand; Programming;
Conference_Titel :
Energy Efficient Supercomputing Workshop (E2SC), 2014
Conference_Location :
New Orleans, LA
DOI :
10.1109/E2SC.2014.15