Application of Test-View Modeling to Hierarchical ATPG

Hierarchical ATPG has become a standard methodology to achieve full coverage for large SoCs. But with increasing size of SoCs even hierarchical ATPG is hitting limitations, pushing ATPG Tool capabilities and design-center compute resources to their limits. This paper illustrates the application of test view models to hierarchical ATPG with a focus on advantages of using Test View models as part of scan verification and Test pattern generation in large SoCs. The paper also outlines the requirements for generating a robust Test View model and the different methodologies considered for generating the test view model.