DocumentCode
233859
Title
Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization
Author
Marcon, Cesar ; Fernandes, Ramon ; Cataldo, Rodrigo ; Grando, Fernando ; Webber, Thais ; Benso, Ana ; Poehls, Leticia B.
Author_Institution
Pontificia Univ. Catolica do Rio Grande do Sul, Porto Alegre, Brazil
fYear
2014
fDate
5-9 Jan. 2014
Firstpage
228
Lastpage
233
Abstract
This paper presents Tiny NoC, which is a scalable and efficient 3D mesh architecture developed to minimize latency and NoC area. First, we show a theoretical analysis of latency and area occupancy to demonstrate Tiny NoC efficiency when compared to a basic mesh NoC. Then, we select a set of synthetic and mapping independent traffic with several injection rates to analyze the advantages and weaknesses of Tiny NoC. The experimental results highlight that Tiny NoC always reduces area occupancy and for several cases it provides latency minimization.
Keywords
minimisation; network routing; network topology; network-on-chip; area minimization; efficient 3D mesh topology architecture; latency minimization; mapping independent traffic; router channel optimization; synthetic independent traffic; tiny NoC efficiency; Clocks; Nickel; Optimization; Ports (Computers); Routing; Three-dimensional displays; Topology; 3D mesh NoC; area; latency; optimization;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and 2014 13th International Conference on Embedded Systems, 2014 27th International Conference on
Conference_Location
Mumbai
ISSN
1063-9667
Type
conf
DOI
10.1109/VLSID.2014.46
Filename
6733135
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