DocumentCode
233948
Title
Leakage Modeling for Devices with Steep Sub-threshold Slope Considering Random Threshold Variations
Author
Paul, A. ; Kshirsagar, Chaitanya ; Sapatnekar, Sachin S. ; Koester, S. ; Kim, Chul Han
Author_Institution
Electr. & Comput. Eng., Univ. of Minnesota, Minneapolis, MN, USA
fYear
2014
fDate
5-9 Jan. 2014
Firstpage
399
Lastpage
404
Abstract
In this paper we propose a generic approach to statistically model leakage variation of devices with steep sub-threshold slope caused by random threshold variations. Monte Carlo simulation results based on our model show less than 11% error in 6σ leakage current estimation compared to 65% error using conventional square root method. A design example based on SRAM bit line leakage issue is also presented to show the correctness of our model in a realistic circuit scenario. This general-purpose modeling technique could be a useful tool in estimating leakage in a variety emerging device technology.
Keywords
Monte Carlo methods; SRAM chips; leakage currents; Monte Carlo simulation; SRAM bit line leakage; general-purpose modeling; leakage current estimation; leakage modeling; random threshold variations; steep sub-threshold slope; Estimation; Leakage currents; MOSFET; Mathematical model; Monte Carlo methods; Random access memory; Standards; Monte Carlo simulation; SRAM; leakage current; statistical analysis; sub-threshold slope;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design and 2014 13th International Conference on Embedded Systems, 2014 27th International Conference on
Conference_Location
Mumbai
ISSN
1063-9667
Type
conf
DOI
10.1109/VLSID.2014.75
Filename
6733164
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