DocumentCode
2340598
Title
Some results on yield and local design rule relaxation
Author
Crépeau, J. ; Thibeault, C. ; Savaria, Y.
Author_Institution
Dept. of Electr. Eng., Ecole Polytech. de Montreal, Que., Canada
fYear
1993
fDate
27-29 Oct 1993
Firstpage
144
Lastpage
151
Abstract
The authors study the influence of the line separation in a bus structure on a circuit cost. This structure was selected because it is easy to analyze and yet widely used. Using an analytical model, It is shown that an optimal design rule exists and how the gains obtained by using this optimal design rule depend on the bus length, the defect size distribution exponent and the clustering parameter. Some of the conclusions apply more generally to the problem of realizing design rules in an integrated circuit
Keywords
logic design; analytical model; bus length; bus structure; circuit cost; clustering parameter; defect size distribution exponent; line separation; local design rule relaxation; optimal design rule; Analytical models; Circuit simulation; Conductors; Cost function; Distributed computing; Integrated circuit modeling; Integrated circuit yield; Robustness; Routing; Yield estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 1993., The IEEE International Workshop on
Conference_Location
Venice
ISSN
1550-5774
Print_ISBN
0-8186-3502-9
Type
conf
DOI
10.1109/DFTVS.1993.595745
Filename
595745
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