Modeling of Transaction Level SystemC modules and transactional channels with Petri nets

Author

Bennour, Imed ; Tourki, Rached

Author_Institution

Fac. of Sci. of Monastir, Monastir

fYear

2008

fDate

7-9 Nov. 2008

Firstpage

1

Lastpage

6

Abstract

Currently, Transaction Level Modeling (TLM) is being used in the industry to solve a variety of practical problems during the design and deployment of electronic systems. TLM and SystemC gain popularity partly due to their simulation capabilities. However, formal models associated to SystemC designs and TLM descriptions are less developed. This paper describes how to translate SystemC modules defined at transactional level to formal Petri Net models. These models offer help in understanding the behaviour of third party modules used in component-based system. This paper focuses mainly on the translation of blocking and non-blocking Interface Method Calls which are the basis of TLM.

Keywords

Petri nets; hardware description languages; logic design; system-on-chip; Petri nets; SoC design; TLM; component-based system; system on chip; transaction level SystemC module modeling; transactional channel; Circuits and systems; Electronics industry; Embedded system; Formal verification; Hardware; Parallel languages; Petri nets; Signal design; System-level design; System-on-a-chip; Petri Nets; SystemC; Transaction-level modeling; formal models;

fLanguage

English

Publisher

ieee

Conference_Titel

Signals, Circuits and Systems, 2008. SCS 2008. 2nd International Conference on

Conference_Location

Monastir

Print_ISBN

978-1-4244-2627-0

Electronic_ISBN

978-1-4244-2628-7

Type

conf

DOI

10.1109/ICSCS.2008.4746955

Filename

4746955