In-situ steam generation for shallow trench isolation in sub-100 nm devices

At sub-100 nm device nodes, the implementation of shallow trench isolation (STI) becomes more challenging due to shrinking geometries, increasing circuit density, and more stringent device leakage requirements. The manufacture of STI structures incorporates aspects of trench definition (lithography, etch), thermal oxidation, trench fill with deposited oxide, and CMP. The thermal oxidation step following trench etch is particularly important, as it can adversely impact transistor performance if not implemented successfully. The STI liner oxide is necessary to round the top and bottom trench corners for good transistor characteristics. With shrinking device geometries, these liner oxides are becoming thinner; therefore traditional methods for STI liner oxidation are proving ineffective. The In-Situ Steam Generation (ISSG) process addresses the limitations of other thermal oxidation methods through minimal consumption of the active area while effectively rounding the top and bottom trench corners of the STI structure and minimizing stress-induced defects. This paper discusses the benefits of ISSG for thermal oxidation in shallow trench isolation manufacture.