DocumentCode
2342228
Title
Hardware design of image recognition system based ARM and FPGA
Author
Zhang, Daode ; Yang, Guangyou ; Zhang, Jiangtao ; Gao, Heng
Author_Institution
Sch. of Mech. Engin, Hubei Univ. of Technol., Wuhan
fYear
2008
fDate
3-5 June 2008
Firstpage
635
Lastpage
638
Abstract
Hardware design of image recognition system based on ARM and FPGA is introduced. System is compartmentalize into three modules, image collection and low-level processing module, which include the CMOS image sensor control, video data collection; video data preservation and VGA display module; System management and external interface modules, which include USB, Ethernet, PS2, and RS-232 etc. The FPGA internal functional module is introduced in detail, which include initialization control of image collection, data flow generation control of camera pixel, video data processing, SDRAM control, VGA control, sequential control of modules working ,etc.
Keywords
digital signal processing chips; field programmable gate arrays; image recognition; logic design; ARM; field programmable gate array; image collection; image recognition hardware system design; low-level processing module; CMOS image sensors; Cameras; Control systems; Displays; Ethernet networks; Field programmable gate arrays; Hardware; Image recognition; Pixel; Universal Serial Bus; ARM; FPGA; Hardware design; Image Recognition;
fLanguage
English
Publisher
ieee
Conference_Titel
Industrial Electronics and Applications, 2008. ICIEA 2008. 3rd IEEE Conference on
Conference_Location
Singapore
Print_ISBN
978-1-4244-1717-9
Electronic_ISBN
978-1-4244-1718-6
Type
conf
DOI
10.1109/ICIEA.2008.4582592
Filename
4582592
Link To Document