Circuit design technique for high efficiency Class F amplifiers

Author

Grebennikov, A.V.

Author_Institution

Inst. of Microelectron. (IME), Singapore

Volume

2

fYear

2000

fDate

11-16 June 2000

Firstpage

771

Abstract

In this paper, lead network circuit technique to design high efficiency Class F amplifiers using new types of loading circuits was demonstrated. The loading circuits were realized using both lumped elements and transmission lines. The derived values of each circuit element are given. The simulation procedure and experimental verification were performed on the example of high-voltage LDMOSFET power amplifier. The test measurements show that, for this power amplifier, 76% drain efficiency can be achieved for 20 W output power at 500 MHz operating frequency.

Keywords

MMIC power amplifiers; MOS analogue integrated circuits; UHF integrated circuits; UHF power amplifiers; field effect MMIC; integrated circuit reliability; 20 W; 500 MHz; 76 percent; class F amplifiers; drain efficiency; high-voltage LDMOSFET power amplifier; lead network circuit technique; loading circuits; lumped elements; operating frequency; output power; transmission lines; Circuit simulation; Circuit synthesis; Circuit testing; Distributed parameter circuits; Frequency measurement; High power amplifiers; Power amplifiers; Power measurement; Power transmission lines; Transmission line measurements;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Symposium Digest. 2000 IEEE MTT-S International

Conference_Location

Boston, MA, USA

ISSN

0149-645X

Print_ISBN

0-7803-5687-X

Type

conf

DOI

10.1109/MWSYM.2000.863295

Filename

863295