DocumentCode
2343153
Title
Timing accuracy in VLSI testing
Author
Pavlik, E. ; Vuksic, A.
Author_Institution
Siemens AG, Munich, West Germany
fYear
1989
fDate
12-14 Apr 1989
Firstpage
100
Lastpage
104
Abstract
Timing errors arising during VLSI device testing are reviewed. Particular attention is given to internal tester errors caused by the characteristics of the hardware and the autocalibration procedure used, and application-related errors in DC testing, function testing, and AC testing (testing of dynamic parameters). It is concluded that extremely expensive testers or testers highly geared to specific characteristics are not necessarily the most economical or most cost-effective solution, not even for standard applications
Keywords
VLSI; automatic test equipment; automatic testing; calibration; integrated circuit testing; measurement errors; AC testing; DC testing; IC testing; VLSI testing; autocalibration; cost; dynamic parameters; function testing; internal tester errors; timing accuracy; timing errors; Accuracy; Clocks; Integrated circuit modeling; Integrated circuit testing; Large scale integration; Manufacturing; Production; Propagation delay; Timing; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1989., Proceedings of the 1st
Conference_Location
Paris
Print_ISBN
0-8186-1937-6
Type
conf
DOI
10.1109/ETC.1989.36229
Filename
36229
Link To Document