Dynamic test compression using statistical coding

Author

Ichihara, Hideyuki ; Ogawa, Atsuhiro ; Inoue, Tomoo ; Tamura, Akio

Author_Institution

Fac. of Inf. Sci., Hiroshima City Univ., Japan

fYear

2001

fDate

2001

Firstpage

143

Lastpage

148

Abstract

Test compression/decompression is an efficient method for reducing the test application cost. In this paper we propose a test generation method for obtaining test-patterns suitable to test compression by statistical coding. In general, an ATPG generates a test-pattern that includes don´t-care values. In our method, such don´t-care values are specified based on an estimation of the final probability of 0/1 occurrence in the resultant test set. Experimental results show that our method can generate test patterns that are able to be highly compressed by statistical coding, in small computational time

Keywords

VLSI; automatic test pattern generation; data compression; encoding; integrated circuit testing; logic testing; probability; ATPG; VLSI circuit testing; compressed test set; dynamic test compression; probability; statistical coding; test application cost; test generation method; test-patterns; Automatic test pattern generation; Circuit faults; Circuit testing; Clocks; Costs; Probability; Registers; Test pattern generators; Transportation; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2001. Proceedings. 10th Asian

Conference_Location

Kyoto

ISSN

1081-7735

Print_ISBN

0-7695-1378-6

Type

conf

DOI

10.1109/ATS.2001.990273

Filename

990273