DocumentCode
2343508
Title
Easily testable iterative unidimensional CMOS circuits
Author
Rubio, A. ; Anglada, R. ; Figueras, J.
Author_Institution
Dept. of Electron. Eng., Polytech. Univ. of Catalunya, Barcelona, Spain
fYear
1989
fDate
12-14 Apr 1989
Firstpage
240
Lastpage
245
Abstract
The C-testability of combinational unidimensional iterative circuits implemented in CMOS technology is discussed. In this technology the stuck-open faults impose additional requirements beyond the usual C-testability conditions. The requirements are considered for the classical adder and incrementer circuits, and these circuits are shown to be potentially C-testable even when stuck-open faults are taken into account. C-testable sets of test patterns that detect all the single stuck-open and all the single stuck-at faults are presented. Results for Moore-type sequential iterative circuits are also presented
Keywords
CMOS integrated circuits; VLSI; combinatorial circuits; integrated circuit testing; integrated logic circuits; logic testing; sequential circuits; C-testability; CMOS technology; IC testing; Moore-type sequential iterative circuits; adder; combinational unidimensional iterative circuits; incrementer circuits; iterative unidimensional CMOS circuits; logic testing; stuck-open faults; Adders; Automatic testing; CMOS technology; Circuit faults; Circuit testing; Digital circuits; Integrated circuit testing; Semiconductor device modeling; Sequential analysis; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
European Test Conference, 1989., Proceedings of the 1st
Conference_Location
Paris
Print_ISBN
0-8186-1937-6
Type
conf
DOI
10.1109/ETC.1989.36249
Filename
36249
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