Title :
A new inter-core built-in-self-test circuit for tri-state buffers in the system-on-a-chip
Author :
Kishi, Tetsuji ; Ohta, Mitsuyasu ; Taniguchi, Takashi ; Kadota, Hiroshi
Author_Institution :
Matsushita Electr. Ind. Co. Ltd., Japan
Abstract :
A new inter-core BIST circuit for tri-state buffers, T-BIST, mainly consists of simple circuits distributed in the relevant blocks. It can give an excellent test-coverage with a little additional hardware. Its configuration is not specified by each SoC structure, so it is suitable for a general/reusable testable IP
Keywords :
application specific integrated circuits; automatic testing; buffer circuits; built-in self test; industrial property; integrated circuit testing; logic testing; SoC structure; T-BIST; functional blocks; general/reusable testable IP; inter-core built-in-self-test circuit; system on a chip; test-coverage; tri-state buffers; Built-in self-test; Circuit faults; Circuit testing; Clocks; Decoding; Fault detection; Graphics; Hardware; Signal generators; System-on-a-chip;
Conference_Titel :
Test Symposium, 2001. Proceedings. 10th Asian
Conference_Location :
Kyoto
Print_ISBN :
0-7695-1378-6
DOI :
10.1109/ATS.2001.990332
