DocumentCode
2344421
Title
A Study of Dynamic Branch Predictors: Counter versus Perceptron
Author
Ho, C.Y. ; Chong, K.F. ; Yau, C.H. ; Fong, Anthony S S
Author_Institution
Dept. of Electron. Eng., City Univ. of Hong Kong
fYear
2007
fDate
2-4 April 2007
Firstpage
528
Lastpage
536
Abstract
As the instruction issue rate and depth of pipelining increase, branch prediction is considered as a performance hurdle for modern processors. Extremely high branch prediction accuracy is essential to deliver their potential performance. Many strategies have been investigated to improve the dynamic branch prediction. Among them, those using 2-bit saturating up-down counter and those using perceptron have dominated over other predictors. This paper presents comparison between counter-based branch predictor and perceptron-based branch predictor and discusses the future developments of dynamic branch prediction
Keywords
computer architecture; perceptrons; computer architecture; counter-based branch predictor; dynamic branch predictors; neural network; perceptron-based branch predictor; perceptrons; up-down counter; Accuracy; Artificial neural networks; Computer architecture; Counting circuits; History; Information technology; Microarchitecture; Neural networks; Pipeline processing; Shift registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Technology, 2007. ITNG '07. Fourth International Conference on
Conference_Location
Las Vegas, NV
Print_ISBN
0-7695-2776-0
Type
conf
DOI
10.1109/ITNG.2007.22
Filename
4151738
Link To Document