A power efficient channel selection filter/coarse AGC with no range switching transients

Author

Palaskas, Yorgos ; Tsividis, Yannis ; Boccuzzi, Vito

Author_Institution

Intel Labs, Hillsboro, OR, USA

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

21

Lastpage

24

Abstract

This paper presents a channel selection filter/coarse AGC system implemented in a 0.25 μm digital CMOS process. The system uses multiple filtering paths, each optimized for part of the required total dynamic range, resulting in small power dissipation (9 mA at 2.5 V) and chip area (0.7 mm²). The individual filtering paths operate continuously, providing undisturbed output over the entire time, contrary to conventional AGC-filter schemes. The fabricated prototype maintains a signal/(noise + IM3 distortion) ratio of at least 33 dB, over a 48 dB signal range, with good blocker immunity.

Keywords

CMOS analogue integrated circuits; automatic gain control; continuous time filters; integrated circuit design; low-power electronics; 0.25 micron; 2.5 V; 9 mA; blocker immunity; coarse AGC system; continuous-time filters; digital CMOS process; filter dynamic range; multiple filtering paths; power efficient channel selection filter; range switching transients; Band pass filters; CMOS process; Circuit noise; Digital filters; Distortion; Dynamic range; Filtering; Frequency; Power dissipation; Prototypes;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249352

Filename

1249352