FFT Simulation and Implementation in TMS 320C6713

This paper deals with simulation and implementation of the FFT algorithm in TMS 320C6713 as a radar signal processor unit. Furthermore it has provided a new method for real-time implementation of the Fast Fourier Transform algorithm that is a very time consuming calculation, in most DSP processors. There also has been indicated a method for conducting several simultaneous operation in a guideline cycle including several accessing to the memory, producing several address using pointers and hardware multiplication. Using Ping Pong technique also didn´t result in loss of any sample and so system is working as Real Time. By combining Ping Pong technique and rotating buffers this paper will reduce the speed of calculation which is very important for radar processors. Results of our innovation indicates a very good performance of the method provided in designing and making a signal processing unit of a radar system which has been tested in a real environment.