Title :
A 2.3Gb/s fully integrated and synthesizable AES Rijndael core
Author :
Kim, Nam Sung ; Mudge, Trevor ; Brown, Richard
Author_Institution :
Dept. of Electr. Eng. & Comput. Sci., Michigan Univ., Ann Arbor, MI, USA
Abstract :
The growth of the Internet as a vehicle for secure communication and electronic commerce has brought cryptographic processing performance to the forefront of high throughput system design. This trend will gain further momentum with the widespread adoption of secure protocols such as secure IP (IPSEC) and virtual private networks (VPNs). In this paper, we present a fully integrated and synthesizable cipher core supporting the advanced encryption standard - Rijndael. We designed and fabricated the fully integrated core $key scheduler, encipher, and decipher using TSMC 0.18 μm technology. The core operating frequency is 465 MHz and throughput is 2.3 Gb/s.
Keywords :
cryptography; integrated circuit design; logic design; telecommunication security; 0.18 micron; 2.3 Gbit/s; 465 MHz; IPSEC; Internet; VPN; advanced encryption standard; cipher core; cryptographic processing; decipher; electronic commerce; encipher; fully integrated AES core; key scheduler; secure IP; secure communication; secure protocols; synthesizable AES Rijndael core; virtual private networks; Cache storage; Cryptographic protocols; Cryptography; Electronic commerce; Network synthesis; Polynomials; Processor scheduling; Throughput; Vehicles; Virtual private networks;
Conference_Titel :
Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003
Print_ISBN :
0-7803-7842-3
DOI :
10.1109/CICC.2003.1249389
