SP: an advanced surface-potential-based compact MOSFET model

Author

Gildenblat, G. ; Chen, T.-L. ; Gu, X. ; Wang, H. ; Cai, X.

Author_Institution

Dept. of Electr. Eng., Pennsylvania State Univ., University Park, PA, USA

fYear

2003

fDate

21-24 Sept. 2003

Firstpage

233

Lastpage

240

Abstract

This work describes an advanced physics-based compact MOSFET model (SP). Both the quasi-static and non-quasistatic versions of SP are surface-potential-based. The model is symmetric, includes the accumulation region, small-geometry effects, and has a consistent current and charge formulation. The surface potential is computed analytically and there are no iterative loops anywhere in the model. Availability of the surface potential in the source-drain overlap regions enables a physics-based formulation of the extrinsic model (e.g. gate tunneling current) and allows for a noise model free of discontinuities or unphysical interpolation schemes. Simulation results are used to illustrate the interplay between the model structure and circuit design.

Keywords

MOSFET; semiconductor device models; semiconductor device noise; surface potential; tunnelling; accumulation region; gate tunneling current; noise model; nonquasistatic modeling; physics-based compact MOSFET model; quasi-static modeling; small-geometry effects; source-drain overlap regions; surface-potential-based MOSFET model; symmetric model; Analog circuits; Circuit noise; Circuit simulation; Circuit synthesis; Computational modeling; Interpolation; MOSFET circuits; Physics; Threshold voltage; Tunneling;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 2003. Proceedings of the IEEE 2003

Print_ISBN

0-7803-7842-3

Type

conf

DOI

10.1109/CICC.2003.1249394

Filename

1249394