200MHz/200MSPS 3.2W at 1.5V Vdd, 9.4Mbits ternary CAM with new charge injection match detect circuits and bank selection scheme

A 9.4 Mbits ternary CAM device has been designed and fabricated. A performance of 200 MHz/200 MSPS (million searches per second) with 3.2 W at 1.5 V Vdd was achieved. Two new approaches were taken to achieve this performance. One is the charge injection match detect circuits (CIMDC) for a very small swing voltage level (about 300 mV) of a match line and stable detection of it. The other is the improved bank selection scheme (BSS) with the data-storing method, in order to activate only the target bank where a match data is expected to be stored. The 200 MSPS is 1.6 times faster and the 3.2 W is almost 1/4 less power consumption compared with the conventional design.