FPGA implementation of SC-FDE for 60 GHz WPAN

The Orthogonal Frequency Division Multiplexing (OFDM) suffers from several drawbacks, including high peak-to-average power ratio, intolerance to power amplifiers nonlinearity and high sensitivity to frequency offsets, which present major issues in the millimetre wave front-ends. To overcome those impairments, Single-Carrier with Frequency Domain Equalization (SC-FDE) presents a prominent alternative, where this technique has shown a comparable ability with OFDM to mitigate intersymbols interference (ISI) in hostile radio propagation multipath channel, but with much smaller peak-to-average power ratio and similar overall complexity. In this paper, SC-FDE transceiver with fractional-spaced Minimum Mean Square Error Frequency Domain Equalization (MMSE-FDE) equalization and time domain channel estimation that is compliant with the IEEE 802.15.3c standard is implemented on FPGA platform. The performance of the implemented transceiver is evaluated in different millimetre wave indoor channels with line-of-sight and non-line-of-sight transmission.