On the Design of a Parallel Link Using Rigid-Flex PCB Technology

This article is a case study on the design, on manufacturing issues, and on performance of an interconnect unit built as a multilayer rigid-flex printed circuit board. The intended use, connecting eight existing FPGA-boards installed in four PCs, presented serious design restrictions and challenges. The width of the interconnects was limited to 14.6mm at a length of 400mm. Fine-trace PCB technology, and fine-pitch SMD devices had to be used. For cost reasons, and to maintain mechanical flexibility, the number of flexible layers was limited. A total of 86 parallel traces needed to be placed on two layers, at only 210mum edge-to-edge distance, resulting in what appeared to be a worst-case scenario with respect to crosstalk. Thus, signal integrity is the main focus of this paper. Nevertheless, crosstalk is at a tolerable level in the final design. Currently the interconnect units, called Gris-Links, are being tested and integrated into the system. In our test environment, clock rates of 250MHz were achieved, for a maximum bandwidth of 2GByte/s per link