Title :
Lazy Decision Diagrams for Word-Level Model Manipulation in Software Verification
Author_Institution :
Nat. Taiwan Univ., Taipei, Taiwan
Abstract :
Word-level predicates involve high-level descriptions of integer variables and can be complex to represent and manipulate with traditional decision diagrams like BDDs (binary decision diagrams) and MDDs (multiple-valued decision diagrams). We propose a new type of decision diagram nodes, called LD-nodes (lazy decision nodes), for word-level inequalities that allow for lazy evaluation. Such nodes can be incorporated in BDDs, MDDs, and CRDs (clock-restriction diagrams). We present algorithms for operations on diagrams with LDD nodes. We then report our experiment of our technology with several benchmarks. A library implementing the approach is available at Source Forge web page for project REDLIB.
Keywords :
decision diagrams; program verification; software libraries; REDLIB project; Source Forge Web page; binary decision diagram; clock-restriction diagram; high-level description; integer variables; lazy decision diagram; lazy decision nodes; multiple-valued decision diagram; software verification; word-level model manipulation; Arrays; Benchmark testing; Boolean functions; Complexity theory; Context; Safety; BDD; decision diagram; model-checking; simulation; verification;
Conference_Titel :
Theoretical Aspects of Software Engineering (TASE), 2010 4th IEEE International Symposium on
Conference_Location :
Taipei
Print_ISBN :
978-1-4244-7847-7
DOI :
10.1109/TASE.2010.31