An efficient method to predict drain current dispersion in MOS transistors from technological parameters fluctuations

Author

Conti, M. ; Orcioni, S. ; Turchetti, C. ; Bellutti, P.L. ; Zen, M. ; Zorzi, N. ; Soncini, G.

Author_Institution

Dipartimento di Elettronica, Ancona Univ., Italy

fYear

1995

fDate

22-25 Mar 1995

Firstpage

209

Lastpage

214

Abstract

This paper proposes an empirical MOSFET model, supported by statistically significant data derived from measurements on test-structures. The model, due to its accuracy, can be useful in predicting “a priori” fabrication process tolerances on ICs performances and in carrying out a combined “process-circuit” performances optimization

Keywords

MOS integrated circuits; MOSFET; VLSI; circuit optimisation; integrated circuit design; semiconductor device models; IC design; MOS transistors; VLSI; drain current dispersion; empirical MOSFET model; fabrication process tolerances; process-circuit performance optimization; statistically significant data; technological parameters fluctuations; test structures; Analog circuits; Circuit testing; Context modeling; Fabrication; Fluctuations; MOSFET circuits; Parameter estimation; Predictive models; Vectors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on

Conference_Location

Nara

Print_ISBN

0-7803-2065-4

Type

conf

DOI

10.1109/ICMTS.1995.513974

Filename

513974

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2347080