Title :
Influence of tilted high-energy ion-implantation upon scaled CMOS structure
Author :
Takatsuka, H. ; Sato, H. ; Izawa, T. ; Hisaeda, T. ; Goto, H. ; Kawamura, S.
Author_Institution :
LSI Process Dev. Div., Fujitsu Labs. Ltd., Kawasaki, Japan
Abstract :
Retrograde well needs a thick resist mask and ions should be implanted into a wafer at a tilt angle to minimize channeling, therefore, “mask edge shadowing” becomes serious. We evaluated the influence of the angle of ion-implantation on Vth shifts of MOSFETs when source/drain-well spacing becomes small. It is known that when the nsd-nwell spacing becomes small, nwell impurities diffuse laterally to NMOS channel regions. That causes Vth lowering. But we found out a new phenomenon that Vth rises when the nsd-pwell spacing becomes small. That is caused by penetration of high-energy ions for well formation through the mask edge. The angle of ion-implantation for the well formation is influential on Vth of MOSFETs nearby the mask edge. The ion-implantation at 0° tilt angle is desired
Keywords :
CMOS integrated circuits; integrated circuit technology; ion implantation; MOSFETs; impurity diffusion; mask edge shadowing; resist mask; retrograde well; scaled CMOS structure; threshold voltage; tilted high-energy ion-implantation; CMOS process; Circuit testing; Degradation; Electric breakdown; Fluctuations; Impurities; Large scale integration; MOS devices; MOSFETs; Resists;
Conference_Titel :
Microelectronic Test Structures, 1995. ICMTS 1995. Proceedings of the 1995 International Conference on
Conference_Location :
Nara
Print_ISBN :
0-7803-2065-4
DOI :
10.1109/ICMTS.1995.513982
