DocumentCode
2347782
Title
Test input generation for supply current testing of bridging faults in bipolar combinational logic circuits
Author
Kuchii, Toshimasa ; Hashizume, Masaki ; Tamesada, Takeomi
Author_Institution
Fac. of Eng., Tokushima Univ., Japan
fYear
1998
fDate
12-13 Nov 1998
Firstpage
14
Lastpage
18
Abstract
A test input generation algorithm for supply current tests is proposed to detect bridging faults in bipolar combinational circuits. By using the algorithm, test input vectors are derived for ISCAS-85 benchmark circuits, which are implemented on printed boards. It is shown by the test generation that more faults in bipolar circuits can be detected with a smaller number of test input vectors than a conventional test method based on output logic values
Keywords
bipolar logic circuits; combinational circuits; fault location; integrated circuit testing; logic testing; ISCAS-85 benchmark circuits; bipolar combinational logic circuits; bridging faults; supply current testing; test input generation; test input vectors; CMOS logic circuits; Circuit faults; Circuit testing; Combinational circuits; Current supplies; Electrical fault detection; Fault detection; Feedback; Logic circuits; Logic testing;
fLanguage
English
Publisher
ieee
Conference_Titel
IDDQ Testing, 1998. Proceedings. 1998 IEEE International Workshop on
Conference_Location
San Jose, CA
Print_ISBN
0-8186-9191-3
Type
conf
DOI
10.1109/IDDQ.1998.730726
Filename
730726
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