Title :
A low-power ultra-fast capacitor-less LDO with advanced dynamic push-pull techniques
Author :
Ming, Xin ; Zhou, Ze-kun ; Zhang, Bo
Author_Institution :
State key Lab. of Electron. Thin Films & Integrated Devices, Univ. of Electron. Sci. & Technol. of China, Chengdu, China
Abstract :
A current-efficent, fully integrated low-dropout regulator(LDO) with improved load transient responses for system-on-chips(SoC) is presented in this paper. It makes use of high bandwidth common-gate amplifier and slew-rate enhancement circuit(SRE) triggered by voltage spikes to improve output voltage spike and response time of the LDO greatly. The proposed circuit has been implemented in a 0.35μm standard CMOS process and occupies an active chip area of 0.057mm2. Experimental results show that it can deliver 100mA load current at 150mV dropout voltage. It only consumes 8μA quiescent current and is able to recover within 0.2μs even under the maximum load current change. Consequently, a low-power and ultra-fast capacitor-less LDO can be achieved.
Keywords :
CMOS analogue integrated circuits; amplifiers; low-power electronics; system-on-chip; transient response; CMOS process; SRE; SoC; advanced dynamic push-pull techniques; current 100 mA; current 8 muA; high bandwidth common-gate amplifier; improved load transient responses; low-power ultrafast capacitor-less LDO; low-power ultrafast capacitor-less low-dropout regulator; size 0.35 mum; slew-rate enhancement circuit; system-on-chips; time 0.2 mus; voltage 150 mV; voltage spikes; Bandwidth; Capacitors; Logic gates; Power transistors; Transconductance; Transient analysis; Transistors; Low-quiescent current; common-gate; high slew rate; low-dropout regulator; push-pull stage; system-on-chips;
Conference_Titel :
VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4577-0171-9
Electronic_ISBN :
978-1-4577-0169-6
DOI :
10.1109/VLSISoC.2011.6081629
