Title :
Prospects of 3D inductors on through silicon vias processes for 3D ICs
Author :
Bontzios, Yiorgos I. ; Dimopoulos, Michael G. ; Hatzopoulos, Alkis A.
Author_Institution :
Dept. of Electr. & Comput. Eng., Aristotle Univ. of Thessaloniki, Thessaloniki, Greece
Abstract :
Three dimensional (3D) integration attempts to keep Moore´s Law effectively in the years to come. Through-silicon-vias (TSV) processes offer a step towards 3D integration. In this work, the aspects of inductors in the TSV technologies are studied. Various TSV inductor topologies are examined both theoretically and by means of numerical simulations. As results show, true 3D vertical inductor designs offer improvements in inductance and quality factor over the planar ones.
Keywords :
Q-factor; inductors; three-dimensional integrated circuits; 3D IC; 3D vertical inductor designs; Moore Law; TSV process; quality factor; three dimensional integration; through-silicon-vias process; Inductance; Inductors; Metals; Resistance; Substrates; Three dimensional displays; Through-silicon vias; 3D ICs; CMOS; Inductance; Integrated inductor; Through silicon vias;
Conference_Titel :
VLSI and System-on-Chip (VLSI-SoC), 2011 IEEE/IFIP 19th International Conference on
Conference_Location :
Hong Kong
Print_ISBN :
978-1-4577-0171-9
Electronic_ISBN :
978-1-4577-0169-6
DOI :
10.1109/VLSISoC.2011.6081657
