Minimizing redundancy-based motion estimation design for high-definition

In this paper, the redundant data in integer motion estimation that comes from overlapping reference blocks of consecutive current macro blocks processing is eliminated to reduce memory access rate. Based on early predicted candidate in fractional motion estimation, unique interpolation processing is employed to reduce the latency by half. In addition, based on high correlation, the scheme of processing 4×8 and 4×4 block with free of cycles is proposed, so that the number of motion vectors on FME can be reduced up to 59%. Experimental results show that the proposed motion estimation design saves 16% of gate count and 65% of local memory while supporting higher encoding specification.