• DocumentCode
    2349100
  • Title

    Impacts of single trap induced random telegraph noise on finfet devices and SRAM cell stability

  • Author

    Fan, Ming-Long ; Hu, Vita Pi-Ho ; Chen, Yin-Nien ; Su, Pin ; Chuang, Ching-Te

  • Author_Institution
    Dept. of Electron. Eng. & Institue of Electron., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    2011
  • fDate
    3-6 Oct. 2011
  • Firstpage
    1
  • Lastpage
    2
  • Abstract
    In this work, we investigate, for the first time, the impacts of single trap induced Random Telegraph Noise (RTN) on the drain current of FinFET devices and the stability of FinFET 6T SRAM cell. For FinFET operating in tied-gate mode, we show that the charged trap located near the bottom of the sidewall channel, at the middle of the channel between source/drain results in most significant impact (worst position). In independent-gate mode, degraded RTN is observed and depends on the relative location of the trap and current conduction path. In addition, our results indicate that the correlation between RTN and fin Line Edge Roughness (fin LER) and Work Function Variation (WFV) is not obvious as compared with the BULK counterpart. For 6T SRAM operating in subthreshold region, single charged trap for each individual cell transistor, placed at the worst position, forms 64 possible combinations and the resulting extreme values of cell stability during READ and WRITE operations are examined for various Vdd. Because of the reduced carriers with decreasing supply voltage, the relative importance of RTN on cell stability increases and hinders the cell stability of subthreshold 6T SRAM cell in the vicinity of distribution tail.
  • Keywords
    MOSFET; SRAM chips; circuit stability; integrated circuit noise; random noise; FinFET devices; FinFETSRAM cell stability; cell transistor; current conduction path; fin line edge roughness; independent-gate mode; sidewall channel; single charged trap; single trap induced random telegraph noise; tied-gate mode; work function variation; Electron traps; FinFETs; Logic gates; Random access memory; Stability analysis; Wireless sensor networks;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    SOI Conference (SOI), 2011 IEEE International
  • Conference_Location
    Tempe, AZ
  • ISSN
    1078-621X
  • Print_ISBN
    978-1-61284-761-0
  • Electronic_ISBN
    1078-621X
  • Type

    conf

  • DOI
    10.1109/SOI.2011.6081676
  • Filename
    6081676