A Developing Method for Parallel Program Based on System Generator

Author

Wei Han ; Jianchun Xie

Author_Institution

Aeronaut. Comput. Tech. Res. Inst., Xi´an, China

fYear

2014

fDate

15-16 Nov. 2014

Firstpage

544

Lastpage

547

Abstract

FPGA is fit for large parallel programs. To improve the performance of EULER3D program, a PC+FPGA solution based on system generator was practiced. Based on the analysis of the algorithm´s hotspot, a system model was built for EULER3D kernel algorithm constructed with system generator blocks. The data exchange between the PC and the FPGA board used the Gigabit Ethernet MAC interface, and the overall performance of the software improves a lot. The above method was compared to the manual HDL coding development method. The result shows that, with the help of system generator, it can reduce the development cycle and improve the efficiency.

Keywords

computational fluid dynamics; field programmable gate arrays; local area networks; parallel programming; peripheral interfaces; software performance evaluation; CFD; EULER3D kernel algorithm; FPGA board; Gigabit Ethernet MAC interface; PC+FPGA solution; computational fluid dynamics; data exchange; development cycle; parallel programs; software performance; system generator blocks; Algorithm design and analysis; Computational modeling; Field programmable gate arrays; Generators; Mathematical model; Software packages; FPGA; System Generator; computational fluid dynamics(CFD); model-based design; performance optimization;

fLanguage

English

Publisher

ieee

Conference_Titel

Computational Intelligence and Security (CIS), 2014 Tenth International Conference on

Conference_Location

Kunming

Print_ISBN

978-1-4799-7433-7

Type

conf

DOI

10.1109/CIS.2014.163

Filename

7016955