DocumentCode
2349799
Title
Dynamic Test Set Selection Using Implication-Based On-Chip Diagnosis
Author
Alves, N. ; Shi, Y. ; Imbriglia, N. ; Dworak, J. ; Nepal, K. ; Bahar, R.I.
Author_Institution
Sch. of Eng., Brown Univ., Providence, RI, USA
fYear
2011
fDate
23-27 May 2011
Firstpage
211
Lastpage
211
Abstract
We propose using logic implications as a source of online diagnostic data for on-chip test set selection by taking advantage of their ability to automatically identify a restricted set of faults as the potential cause of an observed error. This information will be used to dynamically choose a test set to detect systematic latent defects or wear out in a multi core system.
Keywords
dynamic testing; error detection; integrated circuit testing; system-on-chip; dynamic test set selection; implication-based on-chip diagnosis; Arrays; Electrical engineering; Hardware; Multicore processing; Runtime; System-on-a-chip; Systematics; Logic Implications; on-chip diagnosis; test set selection;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium (ETS), 2011 16th IEEE European
Conference_Location
Trondheim
ISSN
1530-1877
Print_ISBN
978-1-4577-0483-3
Electronic_ISBN
1530-1877
Type
conf
DOI
10.1109/ETS.2011.59
Filename
5957957
Link To Document