Title :
Replacing the PECVD-SiO2 in the through-silicon via of high-density 3D LSIs with highly scalable low cost organic liner: Merits and demerits
Author :
Mariappan, Muralindran ; Fukushima, Tetsuya ; Beatrix, JiChel ; Hashimoto, Hiroya ; Sato, Yuuki ; Lee, Kahyun ; Tanaka, T. ; Koyanagi, Mitsumasa
Author_Institution :
Tohoku Univ., Sendai, Japan
Abstract :
A novel approach to suppress the conventional Cu-TSV induced thermo-mechanical stress in 3D-LSI chip is proposed, fabricated and tested. In this approach, a thermal-chemical-vapor-deposition grown organic poly-imide based polymer is conformally deposited along the side wall of the TSV. As-grown polymer was tested for its physical properties and mechanical properties, and was also evaluated for their role in minimizing the thermo-mechanical stress in vicinal and via-space Si. It was found that replacing the conventional SiO2 dielectric liner (sandwiched between the via-metal and Si) with organic polymer greatly helps in suppressing the thermo-mechanical stress, and thus the keep-out zone.
Keywords :
copper alloys; large scale integration; plasma CVD; polymers; silicon compounds; thermal stresses; three-dimensional integrated circuits; Cu; PECVD; SiO2; as-grown polymer; copper-TSV induced thermo-mechanical stress; dielectric liner; high-density 3D LSI chip; highly scalable low cost organic liner; mechanical properties; physical properties; side wall; thermal-chemical-vapor-deposition grown organic poly-imide based polymer; thermo-mechanical stress; through-silicon via; Dielectrics; Polyimides; Silicon; Stress; Thermomechanical processes; Through-silicon vias;
Conference_Titel :
Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
Conference_Location :
Orlando, FL
DOI :
10.1109/ECTC.2014.6897353