DocumentCode
2351
Title
Comments to “A Distributive-Transconductance Model for Border Traps in III-V/High-k MOS Capacitors”
Author
Yuan Taur ; Han-Ping Chen ; Yu Yuan ; Bo Yu
Author_Institution
Dept. of Electr. & Comput. Eng., Univ. of California, San Diego, La Jolla, CA, USA
Volume
34
Issue
10
fYear
2013
fDate
Oct. 2013
Firstpage
1343
Lastpage
1344
Abstract
The commentors state that in the article named above [ibid., vol. 34, no. 6, pp. 735-737, Jun. 2013] the authors derived a distributed transconductance gm for the equivalent circuit of oxide traps in an MOS capacitor. Their gm expression, the right-hand side of (7), is mathematically identical to the expression of ΔYbt/Δx, (5), of the commetors\´ work "A Distributed Bulk-Oxide Trap Model for Al2O3- InGaAs MOS Devices" published in IEEE TRANSACTIONS ON ELECTRON DEVICES in August, 2012. The commentors have found the missing factor in the derivation to the transconductance model in the article commented-on and reaffirmed that, when all the physics are taken into account, the distributed admittance model they published in 2012 is correct.
Keywords
III-V semiconductors; MOS capacitors; aluminium compounds; equivalent circuits; gallium arsenide; high-k dielectric thin films; indium compounds; Al2O3-InGaAs; distributed admittance model; distributed bulk-oxide trap model; equivalent circuit; high- k MOS capacitors; oxide traps; Admittance; Electric potential; Electron traps; MOS capacitors; Numerical models; Semiconductor device modeling; Transconductance;
fLanguage
English
Journal_Title
Electron Device Letters, IEEE
Publisher
ieee
ISSN
0741-3106
Type
jour
DOI
10.1109/LED.2013.2278097
Filename
6594868
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