Fitness Evaluation Expansion to Enhance GA´S Performance in Evolvable Hardware

In this paper the authors introduce a novel experimental method when using genetic algorithms (GAs) to design and optimise digital hardware (HW). This approach proved to enhance the GA´s performance. It produced more design solutions than selected comparable techniques used by others and maximises optimisation. The novel aspect of our algorithm works at the fitness evaluation stage, where every single unit´s output in the evolved array is taken as a potential solution, instead of specifying specific cells for desired outputs. This will be referred to in this paper as fitness evaluation expansion (FEE). The FEE approach isevaluated experimentally by evolving a 2bit Multiplier and 2bit binary Adder.