A new parameter extraction method for ultra-thin oxide SOI MOSFET´s

Parameter extraction stands as a critical issue for the modeling, simulation and design of CMOS transistors and circuits. Over the years, many methods have been proposed, refined and optimized until they became unable to account for new device characteristics brought about by technological progress. Such a situation applies to ultra-thin oxides, where the transconductance may exhibit negative values. The aim of this paper is: (1) to propose an adequate method for the extraction of the threshold voltage V_T, field effect mobility μ₀, effective channel length (L-ΔL), gate-induced mobility attenuation factors θ_1,2; and (2) to demonstrate its superiority over standard techniques used in thicker oxides (>10 nm). Our test devices were n-channel (partially and fully depleted) SOI MOSFET´s with silicon thicknesses ranging from 30 to 150 nm, with LDD configuration and various gate oxides from 4.5 to 17.5 nm thick. The device width was 25 μm and the gate length varied from 0.4 to 25 μm