Non-FPGA-based Field-programmable Self-repairable (FPSR) Microarchitecture

A non-FPGA-based adaptable microarchitecture is presented for fault/defect-tolerance. This paper also introduces an architecture-level fault/defect recovery capability implemented in an adaptable architecture with field-programmable self-repair (FPSR). This FPSR scheme that dynamically cures delay/permanent faults and soft-errors detected at circuit- and architecture-level, respectively, is demonstrated as a means to overcome the limitations of circuit-level fault/defect tolerance. The FPSR adaptable architecture was developed without employing reconfigurable devices (e.g., FPGAs). This architecture is adaptable enough to fix errors by reasserting different patterns and delays of the recovering signals via rerouted alternative resources/paths for the same operation without causing the same faults again. In order to dynamically respond to FPSR operations with less redundancy, the adaptable microarchitecture generates and delivers alternative sequences of repair signal patterns via its adaptable architecture; these can be implemented in ASIC, while continuously and seamlessly supporting post-fabrication defect-prevention in both hardware and software at system levels.