• DocumentCode
    235122
  • Title

    Experimental identification of warpage origination during the wafer level packaging process

  • Author

    Chunsheng Zhu ; Wenguo Ning ; Heng Lee ; Jiaotuo Ye ; Gaowei Xu ; Le Luo

  • Author_Institution
    State Key Lab. of Transducer Technol., Shanghai Inst. of Microsyst. & Inf. Technol., Shanghai, China
  • fYear
    2014
  • fDate
    27-30 May 2014
  • Firstpage
    815
  • Lastpage
    820
  • Abstract
    Redistribution layer (RDL) composing of polyimide (PI) dielectric layer and electro-chemical deposited (ECD) Cu trace is a critical part for wafer level packaging (WLP). One concern of this multi-layered film structure is the wafer warpage induced during the process, which poses threats to automatic handling, 3-D integration and device reliability. In this paper, the warpage origination during the WLP process was identified and analyzed by experiments and simulations. The wafer warpage evolution during the WLP process was measured by a Multi-beam Optical Sensor system. We found that the cure shrinkage of PI has little effect on the warpage, however, it is mainly caused by the coefficient of thermal expansion (CTE) mismatch between the deposited materials. The ECD Cu trace in RDL accounted for a substantial proportion to the total wafer warpage and lead to a hysteresis response during the thermal processes indicating plastic deformation has taken place. For in-depth understanding, the plastic behavior of ECD Cu film was investigated and the kinematic hardening plastic model was established. Finally, the stresses distribution in RDL structure was simulated by numerical method and the influence of ECD Cu trace pattern on the wafer warpage was evaluated.
  • Keywords
    dielectric materials; thermal expansion; wafer level packaging; coefficient of thermal expansion; cure shrinkage; deposited materials; electrochemical deposit; hysteresis response; multibeam optical sensor system; multilayered film structure; polyimide dielectric layer; redistribution layer; wafer level packaging process; warpage origination; Curing; Films; Plastics; Semiconductor device modeling; Silicon; Strain; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic Components and Technology Conference (ECTC), 2014 IEEE 64th
  • Conference_Location
    Orlando, FL
  • Type

    conf

  • DOI
    10.1109/ECTC.2014.6897379
  • Filename
    6897379