• DocumentCode
    2351536
  • Title

    Hardware Implementation of a Bio-plausible Neuron Model for Evolution and Growth of Spiking Neural Networks on FPGA

  • Author

    Shayani, Hooman ; Bentley, Peter J. ; Tyrrell, Andrew M.

  • Author_Institution
    Dept. of Comput. Sci., UCL, London
  • fYear
    2008
  • fDate
    22-25 June 2008
  • Firstpage
    236
  • Lastpage
    243
  • Abstract
    We propose a digital neuron model suitable for evolving and growing heterogeneous spiking neural networks on FPGAs by introducing a novel flexible dendrite architecture and the new PLAQIF (piecewise-linear approximation of quadratic integrate and fire) soma model. A network of 161 neurons and 1610 synapses was simulated, implemented, and verified on a Virtex-5 chip with 4210 times real-time speed with 1 ms resolution. The parametric flexibility of the soma model was shown through a set of experiments.
  • Keywords
    electronic engineering computing; field programmable gate arrays; neural nets; piecewise linear techniques; FPGA; Virtex-5 chip; bioplausible neuron model; flexible dendrite architecture; hardware implementation; parametric flexibility; piecewise-linear approximation; quadratic integrate and fire soma model; spiking neural networks; Artificial neural networks; Computer science; Evolution (biology); Face detection; Field programmable gate arrays; Neural network hardware; Neural networks; Neurons; Object detection; Parallel processing; Development; Digital Spiking Neuron; FPGA; Growth;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Adaptive Hardware and Systems, 2008. AHS '08. NASA/ESA Conference on
  • Conference_Location
    Noordwijk
  • Print_ISBN
    978-0-7695-3166-3
  • Type

    conf

  • DOI
    10.1109/AHS.2008.13
  • Filename
    4584279