Bipolar transistors under positive and negative gate bias stress

The work presented in this paper is concerned with the effects of a positive and of a negative gate bias stress on punch-through insulated gate bipolar transistors (PT-IGBT´s). Two selections of PT IGBT´s all of the same nominal range were gate biased at their positive and negative maximum gate-to-emitter voltage with drain and emitter short-circuited at 140 /spl deg/C during 1200 hours. A particular interest was taken in the switching parameters. Experimental results on their evolution under the two types of stress are presented in a quantified way. Then, a qualitative analysis of the effects of the switching times shift, due to the IGBT´s ageing, on a PWM inverter operation is presented.