Test head scheduling in a semiconductor test facility

Testing is a critical activity in semiconductor device final manufacturing, including probe and assembly operations. The manufacturing environment at the testing stage is characterized by multiple products, test equipment with varying capability, and specialized kits and handlers that may be product and equipment specific. Together, these features lead to a complex scheduling problem. Current practices for scheduling in this environment are inadequate and result in system performance degradation, leading to lower utilization, poor on-time delivery and high work-in-process inventories. In this paper, we describe the development, validation and implementation of a decision support system to address test facility scheduling issues. Using a commercially available factory planning software platform, we develop a scheduling model and a heuristic based solution for the test facility. The goal of the test head scheduler is to maximize due-date performance while improving test facility throughput within material and capacity constraints. Primary system outputs include device testing schedules, handler resource profiles, kits and equipment and due date performance reports. The model data is from customer order databases, equipment maintenance records, real-time equipment inventory and shop floor control systems. Preliminary model validation is based on inputs from production schedulers. The final version and testing of the algorithms is based on real shop floor data. The model is generic enough to schedule an engineering pilot line as well as a full production environment, both of which are part of a large semiconductor manufacturing organization