Minimization of threshold voltage variation in SOI MOSFETs

SOI NMOS devices incorporating the constant dose design concept were fabricated. The devices had a gate oxide of 8 nm, a buried oxide of 380 nm, and a silicon film thickness (t_Si) that ranged between 42 nm to 53 nm. All measurements were taken on long channel (L _eff>2 μm) devices. The devices implanted with the lowest energy of 20 keV are less sensitive to t_Si variations than those with the higher implant energy conditions. For comparison, the threshold voltage (V_T) calculated from the analytical model of Lim et al. (1983) is also shown for the constant substrate dopings of 3×10¹⁷ cm^-3 and 4×10¹⁷ cm^-3. The V_T sensitivity to t_Si variations was reduced considerably by using the constant dose design concept