DocumentCode
2353071
Title
Symbolic model order reduction
Author
Hu, Bo P. ; Shi, Guoyong ; Shi, C. J Richard
Author_Institution
Dept. of Electr. Eng., Washington Univ., Seattle, WA, USA
fYear
2003
fDate
7-8 Oct. 2003
Firstpage
34
Lastpage
40
Abstract
Symbolic model order reduction (SMOR) is the problem of reducing a large circuit that contains symbolic circuit parameters to smaller low order models at its ports. Several methods, including symbol isolation, single frequency point reduction, and multiple frequency point reduction, are described and compared. Test circuits with simulation results are presented to demonstrate the accuracy and efficiency of SMOR.
Keywords
RLC circuits; circuit simulation; reduced order systems; multiple frequency point reduction; single frequency point reduction; symbol isolation; symbolic circuit parameter; symbolic model order reduction; Chromium; Circuit simulation; Circuit testing; Contracts; Equations; Frequency; Integrated circuit interconnections; Laboratories; Numerical models; RLC circuits;
fLanguage
English
Publisher
ieee
Conference_Titel
Behavioral Modeling and Simulation, 2003. BMAS 2003. Proceedings of the 2003 International Workshop on
Print_ISBN
0-7803-8135-1
Type
conf
DOI
10.1109/BMAS.2003.1249854
Filename
1249854
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