• DocumentCode
    2355206
  • Title

    Handling long-latency loads in a simultaneous multithreading processor

  • Author

    Tullsen, Dean M. ; Brown, Jeffery A.

  • Author_Institution
    Dept. of Comput. Sci. & Eng., California Univ., San Diego, La Jolla, CA, USA
  • fYear
    2001
  • fDate
    1-5 Dec. 2001
  • Firstpage
    318
  • Lastpage
    327
  • Abstract
    Simultaneous multithreading architectures have been defined previously with fully shared execution resources. When one thread in such an architecture experiences a very long-latency operation, such as a load miss, the thread will eventually stall, potentially holding resources which other threads could be using to make forward progress. This paper shows that in many cases it is better to free the resources associated with a stalled thread rather than keep that thread ready to immediately begin execution upon return of the loaded data. Several possible architectures are examined, and some simple solutions are shown to be very effective, achieving speedups close to 6.0 in some cases, and averaging 15% speedup with four threads and over 100% speedup with two threads running. Response times are cut in half for several workloads in open system experiments.
  • Keywords
    multi-threading; parallel architectures; storage management; synchronisation; load miss; long-latency loads handling; simultaneous multithreading processor; withfidly shared execution resources; Bars; Computer architecture; Delay; Hardware; Multithreading; Parallel processing; Surface-mount technology; Switches; Throughput; Yarn;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microarchitecture, 2001. MICRO-34. Proceedings. 34th ACM/IEEE International Symposium on
  • ISSN
    1072-4451
  • Print_ISBN
    0-7965-1369-7
  • Type

    conf

  • DOI
    10.1109/MICRO.2001.991129
  • Filename
    991129